Two-week ISTE STTP on CMOS, Mixed Signal and Radio frequency VLSI Design

Electronics and Communication Department of U. V. Patel College of Engineering successful conducted Two-week ISTE STTP on CMOS, Mixed Signal and Radio frequency VLSI Design organized by Indian Institute of Technology, Kharagpur from 30th  January,2017 to 4th February,2017.(one line activity equivalent to one week from 26th December,2016 to 4th February,2017 and physical participation at Remote Center from 30th January to 4th February,2017 ).This workshop was held under the National Mission on Education through ICT (MHRD). Total 8 participates participated in this workshop. Prof. Bhavesh Soni coordinated the workshop.

Place: 
UVPCE
Date: 
Monday, December 26, 2016 - 11:45 to Saturday, February 4, 2017 - 11:45
Last Changed Date : Mon, 17/04/2017 - 12:27